Combination of Logic Gates

The idea behind universality. Because a NAND gate (Section 9.29) and a NOR gate (Section 9.30) are each, individually, capable of reproducing every one of the other basic gate functions, a real digital circuit of any complexity can be constructed using ONLY NAND gates throughout, or ONLY NOR gates throughout -- never needing a mixture of different gate types at all. This is of genuine practical value: a chip manufacturer needs to design, characterise and mass-produce only a single kind of basic gate, simplifying fabrication considerably, and simply wires many identical copies of it together in different patterns to build every other logic function a circuit might need.

Building a NOT gate from a NAND (or NOR) gate. The simplest combination: tying BOTH inputs of a two-input NAND gate together to the SAME single signal $A$ makes the gate see $A$ on both inputs at once, so $Y = \overline{A\cdot A} = \overline{A}$ -- exactly the NOT-gate behaviour of Section 9.28. The identical trick works for a NOR gate: tying both inputs together gives $Y=\overline{A+A}=\overline{A}$ as well. In both cases, the gate simply degenerates into a plain inverter when its two inputs are forced to agree.

Building an OR gate from NAND gates alone. Since $Y=\overline{A}$ can be obtained from a single NAND (above), first invert BOTH inputs $A$ and $B$ separately, using one NAND-as-inverter on each, to obtain $\overline{A}$ and $\overline{B}$; then feed these two inverted signals into a THIRD NAND gate. The result is

by De Morgan's rule -- exactly the OR-gate function of Section 9.26, built here from three NAND gates in total (two as inverters, plus the final combining NAND). …