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Q.In the figure shown below :

(a) Identify the gates P and Q.
(b) Write the truth table for inputs A and B and output Y.
(c) Identify the logic operation carried out with the combination of gates. OR How can you convert a NAND gate into a :
(i) NOT gate
(ii) AND gate
(iii) OR gate. Write the necessary truth tables and draw the necessary diagrams.
Goa GbshseGBSHSE Class 12 Board Exam 2025Subjective· 4mImportance★★★★★
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Tracing each gate's truth table through the network shows the NAND-NOR-NOR combination reduces exactly to Y=ABY=AB - this circuit is a roundabout way of building an AND gate from NAND/NOR gates.

  1. Identification: Gate P is drawn AND-shaped with a bubble on its output, so it is a NAND gate, giving A′=AB‾A' = \overline{AB}. Gate Q is drawn OR-shaped (curved back) with a bubble on its output, so it is a NOR gate, giving B′=A+B‾B' = \overline{A+B}. The third gate is also OR-shaped with a bubble on its output, taking A′A' and B′B' as its two inputs, so it is also a NOR gate, giving Y=A′+B′‾Y = \overline{A'+B'}.
  2. Truth table:
ABA' = NAND(A,B)B' = NOR(A,B)Y = NOR(A',B')
00110
01100
10100
11001
…

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