Q.Output of the logic circuit represent:

NAND = NOT of AND, so Y = (A·B)‾ (overbar over the whole product A·B).

A NAND gate produces the logical AND of the inputs and then inverts it. Its Boolean expression is

Y = (A·B)‾

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An AND-shape with a bubble at its output is a NAND gate; using single-input NAND gates as inverters followed by a third NAND gate on the inverted signals implements $Y = A + B$ by De Morgan's theorem — an OR gate built entirely from NAND gates.

An 'AND-shaped body with a bubble at the output' is the standard symbol for a NAND gate. Here:

• Input A alone feeds a NAND gate — with a single input effectively tied to itself, this NAND gate acts as an inverter, giving output $\overline{A}$.
• Input B alone similarly feeds another NAND gate acting as an inverter, giving $\overline{B}$.
• These two inverted outputs, $\overline{A}$ and $\overline{B}$, are fed into a third NAND gate, whose output is …

NAND = AND-gate symbol with a small inversion bubble at the output.

A NAND gate performs AND followed by NOT: its output is the inverse of the AND output, Y = (A·B)′. The standard symbol is therefore the flat-backed, rounded-nose AND-gate shape with a small circle (inversion bubble) added at the output.

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A NAND gate is an AND gate followed by a NOT gate, so its Boolean expression is $Y = \overline{A\cdot B}$.

A NAND (NOT-AND) gate first performs the AND operation on its inputs $A$ and $B$ (giving $A\cdot B$) and then inverts (complements) the result. So its output is 1 for every input combination except $A=B=1$, for which it is 0 — exactly the compl …

Two NOT gates (each a NOR gate with its inputs tied together) feeding a third NOR gate realise $Y = \overline{\bar A + \bar B} = A\cdot B$ (De Morgan's theorem) — an AND gate.

From the described circuit: the first bubble-output OR-shaped gate has both its inputs tied to $A$, so it computes $\overline{A+A} = \bar A$ (this is exactly how a NOR gate is used to build a NOT gate). Likewise the second gate, with both inputs tied to $B$, outputs $\bar B$. These two outputs, $\bar A$ and $\bar B$, feed a third bubble-output (NOR) gate, giving: …

Two NAND gates used as inverters (each fed the same input to both its pins) produce $\overline{A}$ and $\overline{B}$; a third NAND gate combining these gives $Y=A+B$ — the standard 3-NAND realisation of an OR gate.

A 2-input bubbled (NAND) gate, when both its inputs are tied to the same signal, acts as a NOT gate (since $\overline{A\cdot A}=\overline{A}$). So the first gate outputs $\overline{A}$ and the second outputs $\overline{B}$.

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Tying both inputs of a NAND gate together makes it a NOT gate; feeding $\overline A$ and $\overline B$ into a third NAND gate and applying De Morgan's theorem gives $Y=A+B$, an OR gate.

Working

A NAND gate with both inputs shorted to the same signal $X$ computes $\overline{X\cdot X}=\overline X$ — i.e. it behaves exactly like a NOT gate.

In this network, the first NAND gate has both inputs tied to $A$, giving output $\overline A$; the second NAND gate has both inputs tied to $B$, giving output $\overline B$.

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An AND-shaped symbol with a bubble at its output is an AND gate followed by inversion — i.e. a NAND gate, $Y=\overline{A.B}$.

The symbol described is the standard AND-gate body (flat back, rounded/pointed front) with inputs $A$ and $B$. A small circle ("bubble") at the output tip is the universal symbol for logical inversion (NOT). An AND gate followed by a NOT (inversion) is, by definition, a NAND gate ("NOT-AND").

Its truth table gives HIGH output for every input combination except when both inputs are HIGH:

| A | B | Y | …

NAND = NOT of AND, so Y = (A·B)‾.

The NAND (Not-AND) gate first performs the AND operation A·B and then inverts the result. Hence its Boolean expression is

$Y = \overline{A\cdot B}.$

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A NAND gate's symbol is simply the AND gate's symbol with a small bubble (circle) added at its output, since NAND = NOT(AND).

A NAND gate is obtained by connecting a NOT gate to the output of an AND gate — its output is the complement of the AND output: $Y = \overline{A \cdot B}$.

Its standard logic symbol is therefore drawn as:

• A D-shaped body (flat vertical edge on the left where the two inputs A and B enter, and a rounded/curved edge on the right, exactly like the AND gate symbol). …

NAND = AND followed by NOT — output is 0 only when both inputs are 1.

A NAND gate is a combination of an AND gate followed by a NOT gate; its output $Y$ is the complement of the AND of its inputs:

$Y = \overline{A \cdot B}$

For two inputs $A$ and $B$, the output is LOW (0) only when both inputs are HIGH (1); for every other input combination the output is HIGH (1). This makes NAND a universal gate — any logic function (AND, OR, NOT) can be built using only NAND gates. …

NAND = AND followed by NOT; its symbol is the standard AND-gate 'D' shape with inputs A, B on the flat side and a small circle at the pointed output end marking inversion.

A NAND (NOT-AND) gate performs the AND operation and then inverts (complements) the result. Its logic symbol is drawn as:

• Two (or more) input lines, $A$ and $B$, entering the flat left side of a D-shaped (rounded) body — the same body shape used for an AND gate.
• A small circle ('bubble'), denoting inversion, placed at the pointed output tip of the D-shape.
• A single output line $Y$ leaving from that bubble. …