The 8051 Microcontroller — Architecture, Addressing Modes and Instruction Set

The microprocessor

A microprocessor is the general-purpose Central Processing Unit (CPU) of a digital computer. By itself it is not a complete computer — it only does the processing and needs external memory and I/O to become useful. Its internal block diagram (Figure 11.1.1) contains an Arithmetic and Logic Unit (ALU), a Program Counter (PC), a Stack Pointer (SP), one or more working registers, a clock-timing circuit and interrupt circuits.

Function of each block:

• Arithmetic and Logic Unit (ALU): performs arithmetic operations and takes logical decisions.
• Accumulator: stores a number; when a second number arrives it adds the two and stores the sum. It can also sense a signal, and clear or complement its contents.
• Working register(s): a short-term store of one word, often a group of flip-flops.
• Program Counter (PC): holds the address of a byte in memory and points to the next instruction to be fetched and executed.
• Stack Pointer (SP): holds an address in internal RAM; used with certain opcodes to store and retrieve data quickly.
• Clock circuit: generates the clock pulses that synchronise all internal operations.
• Interrupt circuits: break the normal program flow and later allow it to resume from the same point.

The microcontroller and its blocks

A microcontroller is a true "computer on a chip". It has every feature of a microprocessor and, in addition, on-chip ROM, RAM, parallel I/O, serial I/O, timers/counters and a clock circuit. Its block diagram (Figure 11.1.2) shows these blocks: ALU; accumulator and register(s); internal RAM (holds the programs the user loads); stack pointer (holds an internal-RAM address); timer/counter (counts internal or external pulses); internal ROM (program memory, holds the fixed program); program counter; I/O port circuits (connect the chip to the outside world); interrupt circuits; and clock circuits.

Comparison between microprocessor and microcontroller

The two devices differ chiefly in what is on the chip and what the designer must add externally. The book's Table 11.1.1 sets them side by side (see the comparison table below).

The 8051 microcontroller

The 8051 is an 8-bit microcontroller with 128 bytes of RAM, 4 KB of on-chip ROM, two timers, one serial port and four 8-bit ports, all on a single chip. Two other members of the same family are the 8052 and the 8031. Its key feature quantities are collected in Table 11.1.2 (see below).

Architecture of the 8051

The 8051 block diagram (Figure 11.1.3) brings together the features that make it a microcontroller: internal ROM and RAM, I/O ports with programmable pins, timers/counters, serial data communication, a program counter, an ALU, working registers and clock circuits. In more detail the 8051 has:

• a 16-bit Program Counter;
• 4 KB of internal ROM or EPROM;
• an 8-bit CPU with registers A (accumulator) and B;
• 128 bytes of internal RAM;
• 32 I/O pins arranged as four 8-bit ports, P0-P3;
• two 16-bit timer/counters, T0 and T1;
• two external and three internal interrupt sources;
• oscillator and clock circuits;
• the control registers TCON, TMOD, SCON, PCON, IP and IE;
• a CISC (Complex Instruction Set Computer) architecture.

The 40-pin DIP pin configuration is shown in Figure 11.1.4, where pin numbers are printed inside the package and pin names outside. Many Port-3 pins carry alternate functions (for example RXD/TXD for the serial port on P3.0/P3.1, the external-interrupt inputs INT0/INT1 on P3.2/P3.3, the timer inputs T0/T1 on P3.4/P3.5, and the WR/RD strobes on P3.6/P3.7), while Port-0 and Port-2 double as the multiplexed address/data bus.

Addressing modes

Because the CPU can keep data in registers, in memory or in an external source, an instruction can reach its data in several ways. The rules that describe how an operand is located are called addressing modes. In 8051 instructions the destination address is written first, followed by the source. The 8051 has five addressing modes: (1) register, (2) direct, (3) immediate, (4) indirect, and (5) base register plus index register; the first four are the ones commonly used. There are 28 opcodes that simply copy data from a source to a destination; the three main data-move opcodes are MOV destination,source; PUSH source / POP destination; and XCH destination,source. The MOV family moves data within the four physical parts of 8051 memory — internal RAM, internal Special Function Registers (SFRs), external RAM, and internal/external ROM — using the opcodes MOV, MOVX, MOVC, PUSH/POP and XCH.

1. Register addressing mode — registers A, DPTR, R0-R7, the accumulator and the carry bit appear as part of the opcode mnemonic, as the source or the destination. Moves happen between A and R0-R7, e.g. MOV A,R0 (copy R0 into A), MOV R2,A (copy A into R2), ADD A,R5 (add R5 to A) and MOV R5,A (save A in R5). The three least-significant bits of the opcode select which register is used (Table 11.1.3 shows this for MOV A,R7). A MOV never alters the source; it only copies.

2. Direct addressing mode — the whole 128 bytes of internal RAM and the SFRs can be addressed directly by a single-byte address. Internal RAM uses addresses 00H-7FH; the SFRs occupy 80H-FFH. The instruction MOV A,direct carries an opcode byte followed by the 8-bit direct address, and the on-chip memory map is shown in Figure 11.1.5. RAM addresses 00H-1FH are also the four banks of eight working registers R0-R7, so, for example, R2 of bank 2 can be reached in register mode as R2 or in direct mode as address 12H. The SFR addresses are listed in Table 11.1.4 and the register-bank direct addresses in Table 11.1.5. Worked instructions include MOV R0,40H, MOV 56H,A, MOV 80H,A (the same as MOV P0,A, because P0 is address 80H), MOV A,4 (the same as MOV A,R4) and MOV 0F0H,R2 (the same as MOV B,R2).

3. Indirect addressing mode — a register acts as a pointer to the data. For data inside the CPU only R0 and R1 may be used as pointers (R2-R7 cannot), and when used this way they must be preceded by the @ sign. Examples: MOV A,@R0 (copy the RAM byte whose address is in R0 into A), MOV @R1,B (copy B into the RAM byte whose address is in R1) and MOV @R1,90H. Figure 11.1.6 shows the internal 128 bytes of RAM (the upper 128 bytes, 80H-FFH, exist only on the 8032/8052).

4. Immediate addressing mode — the data itself is made part of the opcode, so it is immediately available within the instruction. A # sign marks immediate data, e.g. MOV A,#25H, MOV R4,#62, MOV DPTR,#4562H (16-bit) and MOV R7,#06H (8-bit). When the 8051 executes an immediate move, the program counter automatically advances to the byte(s) following the opcode.

5. Base register plus index register addressing mode — an effective address is formed by adding an index register to a base register (used with instructions such as MOVC A,@A+DPTR), giving a flexible way to reach look-up tables held in code memory.

The 8051 instruction set

When a program runs it often has to hand control to a different location, so the 8051 provides a rich instruction set — 111 instructions in all — grouped into four categories: 1. data transfer, 2. arithmetic, 3. logical and 4. program-branching instructions. Every instruction is written as a mnemonic followed by a destination operand and a source operand (the "8051 instruction format").

Data-transfer instructions (MOV, MOVX, MOVC, PUSH, POP and the exchange instructions XCH/XCHD) move data about. They do not affect the PSW flags, except that a MOV or POP written directly to PSW can change the flags. Flags are 1-bit registers that record the result of certain instructions; they are gathered inside the Program Status Word (PSW) and Power Control (PCON) registers so they can be addressed conveniently. The stack instructions PUSH and POP name a direct address and move data to or from an internal-RAM area called the stack; the Stack Pointer (SP) holds the RAM address involved. A PUSH add first increments SP and then copies the byte at add into the RAM location pointed to by SP; a POP add copies the byte from the RAM location in SP back to add and then decrements SP (Figure 11.1.7). The exchange instructions move data both ways at once and always involve register A (for example XCH A,Rn, XCH A,add and XCH A,@R1); every addressing mode except immediate may be used. The complete list is Table 11.1.6. …