Q.(a) Write the truth table for the combination of the gates shown in the figure.

Per the given logic circuit: Y = NOT[ NOR(A,B) AND AND(A,B) ]. Truth table:

A=1,B=1: NOR=0, AND=1, (0 AND 1)=0, NOT(0)=1 -> Y=1

A=1,B=0: NOR=0, AND=0, (0 AND 0)=0, NOT(0)=1 -> Y=1

A=0,B=1: NOR=0, AND=0, 0, NOT=1 -> Y=1

A=0,B=0: NOR=1, AND=0, (1 AND 0)=0, NOT(0)=1 -> Y=1 …

Part (a)

Trace the circuit:

1. NOT gates give $\overline{A}$ and $\overline{B}$.
2. The NOR gate outputs $Y=\overline{\overline{A}+\overline{B}}$. …

Step 1 — Write the intermediate signals.

Input $A$ passes through a NOT gate, so the first NOR input is $\bar A$. Input $B$ passes through the second NOT gate, so the second NOR input is $\bar B$.

Step 2 — Apply the NOR operation.

A NOR gate ORs its inputs and then inverts:

Step 3 — Simplify with De Morgan's theorem.

De Morgan's law states $\overline{X + Y} = \bar X \cdot \bar Y$. With $X = \bar A$ and $Y = \bar B$:

(using the involution law $\overline{\bar A} = A$). So the whole combination behaves as a single AND gate.

Step 4 — Confirm with the truth table.

| $A$ | $B$ | $\bar A$ | $\bar B$ | $\bar A + \bar B$ | $Y = \overline{\bar A+\bar B}$ | $A\cdot B$ |

|---|---|---|---|---|---|---| …

Part (a)

Whatever the internal wiring, the network's output truth table shows $Y=1$ only for the input combination $A=B=1$ and $Y=0$ otherwise. A standard realisation is two inverters feeding a NOR gate, which by De Morgan's law gives …

Part (a)

1. First stage — two-input NAND: $X=\overline{A\cdot B}$.
2. Second stage — a NAND with both inputs tied to $X$ acts as a NOT (since $X\cdot X=X$): $Y=\overline{X\cdot X}=\overline{X}$.
3. Combine: $Y=\overline{\overline{A\cdot B}}=A\cdot B$.

Truth-table check: $Y=1$ only when $A=B=1$ — the AND table.

Part (a)

Apply $Y=\overline{A\cdot B}$:

• $A=1,B=1:\ \overline{1}=0$ (LOW) — both high gives low.
• $A=0,B=0:\ \overline{0}=1$ (HIGH) — both low gives high. …

Part (a)

A two-input logic gate is completely identified by its truth table.

1. A gate whose output is HIGH ($1$) only when both inputs are LOW has the table $00\to1,\;01\to0,\;10\to0,\;11\to0$. This is the NOR gate:

   $Y=\overline{A+B}.$

2. A gate whose output is LOW ($0$) only when both inputs are HIGH has the table $00\to1,\;01\to1,\;10\to1,\;11\to0$. This is the NAND gate: $Y=\overline{A\cdot B}.$ …

1. Identify the gates. Each gate has the flat-back, round-nose AND body plus an inversion bubble on the output — so both are NAND gates:

2. Write the two cross-coupled equations from the wiring in the figure:

This is a NAND latch driven with 1 on the top and 0 on the bottom.

3. Start from the forced gate. Solve the bottom gate first, because one of its inputs is a hard-wired 0. The controlling rule for a NAND:

If any input of a NAND is 0, the AND part is 0, and the bubble inverts it to 1. The other input is irrelevant.

So $Q$ is pinned at 1 — no ambiguity, no memory, no need to guess an initial state.

4. Propagate into the top gate. Now substitute $Q = 1$:

5. Check self-consistency (essential for a latch). Feed $P = 0$ back into the bottom gate: …

Step 1 — identify the gates.

Each gate is drawn as an OR body with an inversion bubble on the output ⇒ both are NOR gates:

Truth table: the output is 1 only when both inputs are 0; if any input is 1, the output is 0.

Step 2 — write the two equations from the wiring.

• Top NOR: inputs are the external 1 and the feedback $Q$ → $\;P = \overline{1 + Q}$
• Bottom NOR: inputs are the feedback $P$ and the external 0 → $\;Q = \overline{P + 0}$

Step 3 — solve the top gate first (it is forced).

One of its inputs is held at logic 1, so $1 + Q = 1$ for any $Q$, hence

The feedback cannot change this — a 1 on a NOR input dominates.

Step 4 — now solve the bottom gate.

Its inputs are $P = 0$ and the external $0$: …

The core idea here is simple: Boolean algebra works with just two values, 0 and 1. When you plug in the given values, the expression becomes a direct arithmetic-like calculation — no need for heavy laws or theorems. The complement (overbar) flips the value: $\overline{0} = 1$ and $\overline{1} = 0$. Then the OR operation ($+$) outputs 1 if at least one input is 1.

Let’s walk through it step by step.

1. Identify the given values.

   We have $A = 1$ and $B = 0$.

2. Find the complement of $B$.

   Since $B = 0$, its complement is $\overline{B} = \overline{0} = 1$.

3. Perform the OR operation.

   The expression is $A + \overline{B} = 1 + 1$.

   In Boolean algebra, $1 + 1 = 1$ (OR is not ordinary addition; it’s logical OR, where 1 OR 1 = 1).

4. Interpret the result.

   So $A + \overline{B} = 1$. Now compare this with the options:

   • (A) $B = 0$ — not equal.
   • (B) $\overline{B} = 1$ — this is numerically equal, but the question asks for the expression in terms of Boolean algebra, meaning we want a symbolic form that matches for all $A$ and $B$? Actually, careful: the problem gives specific values, so we just need which option equals 1 here. But let’s check the intended meaning: the options are symbols, not numbers. Since $A = 1$, option (C) $A$ is also 1. Both (B) and (C) give 1 numerically, but which one is the expression that matches? …