Q.The truth table of a logic gate is given below :
A | B | Y
0 | 0 | 1
0 | 1 | 0
1 | 0 | 0
1 | 1 | 0
(A) Identify the gate. (Score : ½)
(B) Draw the logic symbol of the gate. (Score : ½)
(C) Explain why NAND gate is known as universal gate. (Score : 1)

NAND is a universal gate; NOR is the other. Here the answer is NAND.

A universal gate is one from which any other logic gate (AND, OR, NOT) — and hence any Boolean function — can be constructed. The NAND gate has this property: e.g. a NOT is a NAND with tied inputs, an AND is a NAND followed by a NAND-inverter, and an OR f …

NAND (and equally, NOR) is called a universal gate because any other logic gate (AND, OR, NOT, etc.) can be built using only NAND (or only NOR) gates.

A universal gate is one from which all other basic logic gates (NOT, AND, OR) can be constructed by suitable combinations of that gate alone. Both the NAND gate and the NOR gate have this property, which is why digital ICs are conveniently built …

NAND is genuinely a universal gate (assertion true), but joining the two inputs of a NAND gate produces a NOT gate, not an OR gate — so the given reason is false.

Assertion: 'Any logic gate can be constructed using NAND gate' — this is TRUE. NAND is a universal gate: AND, OR, NOT, NOR, XOR, XNOR can all be built purely from combinations of NAND gates (this is a standard, well-established result in digital electronics).

Reason: 'NAND gate can be converted to OR gate by simply joining the two inputs' — this is FALSE. If both inputs of a NAND gate are tied together and driven by the same signal $A$, the output is

$Y = \overline{A\cdot A} = \overline{A}$ …

NAND is a universal gate because every other basic logic gate (NOT, AND, OR, NOR, etc.) can be built using only NAND gates.

Assertion: NAND is a universal gate — TRUE. A gate is called "universal" if any other logic gate/function can be realised using only that gate.

…

NAND and NOR gates are called universal gates because any logic gate (AND, OR, NOT, and hence any Boolean function) can be built using only NAND gates, or only NOR gates.

A logic gate is called a 'universal gate' if it is possible to build every other basic logic gate (NOT, AND, OR, and by extension XOR, XNOR etc.) by using only that one type of gate, connected suitably.

• A NOT gate can be made from a NAND gate by tying both its inputs together.
• An AND gate can be made from two NAND gates: a NAND gate followed by a NOT gate made from another NAND gate. …

A 'universal' gate is one from which every other logic gate can be constructed; NAND (like NOR) has this property, while NOT, OR and AND individually do not.

A logic gate is called 'universal' if any Boolean logic function — and in particular every other basic gate (NOT, AND, OR) — can be built using only that one type of gate, connected in different combinations.

• A single NAND gate with its two inputs tied together acts as a NOT gate.
• Two NOT (i.e., tied-input NAND) gates followed by a NAND gate reproduce an AND gate.
• Feeding inverted inputs into a NAND gate reproduces an OR gate (by De Morgan's theorem). …

Evaluating gate-by-gate, the final output of the combination is 1.

Concept — reading a logic circuit. Evaluate each gate from its own inputs, then feed the result forward. A small circle (bubble) on a gate's output means that output is inverted (AND becomes NAND, OR becomes NOR). The KSEAB Class-12 Physics syllabus follows the NCERT/CBSE curriculum, where this is the standard convention.

Gate 1 — top AND gate, inputs 1 and 0: $\text{AND}(1,0)=1\cdot 0=0$.

Gate 2 — bottom NOR gate (OR shape with an output bubble), inputs 1 and 0: first $\text{OR}(1,0)=1$, then the output bubble inverts it, so $\text{NOR}(1,0)=\overline{1}=0$.

…

NAND followed by a NAND-used-as-NOT (both its inputs tied together) undoes the first inversion, leaving a plain AND gate.

The figure shows two NAND gates in series: the first NAND gate has inputs $A$ and $B$; its output is split and fed into BOTH inputs of the second NAND gate (which are tied together), and the second gate's output is labelled $Y$.

Step 1 - First NAND gate: With inputs $A$ and $B$, its output is

$C = \overline{A \cdot B}$

Step 2 - Second NAND gate: Its two inputs are both tied to the same signal $C$. A NAND gate with both inputs shorted together behaves exactly like a NOT gate, since

$\overline{C \cdot C} = \overline{C}$

Step 3 - Final output:

$Y = \overline{C} = \overline{\overline{A\cdot B}} = A \cdot B$

So the double inversion (NAND, then NAND-as-NOT) cancels out, and the combination behaves exactly as an AND gate: $Y=1$ only when both $A=1$ and $B=1$.

…

NAND is a universal gate; an OR gate needs exactly 3 NAND gates, using De Morgan's law $A+B=\overline{\overline{A}\cdot\overline{B}}$.

Building blocks.

A NAND gate alone can realise any logic function (it is a 'universal gate'). To build $Y = A+B$ (OR) from NAND gates only:

Step 1 -- make NOT gates from NAND.

Tying both inputs of a NAND gate together makes it act as a NOT gate:

$\overline{A\cdot A} = \overline{A}$

Use one NAND gate to get $\overline{A}$, and a second NAND gate to get $\overline{B}$.

Step 2 -- combine with a third NAND gate.

$\overline{A}\ \text{NAND}\ \overline{B} = \overline{\overline{A}\cdot\overline{B}}$ …