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Electronics · Ch 9 — Power Electronics and its Applications

Power Semiconductor Devices

9.1

Power Semiconductor Devices

Power electronics begins with the switching devices themselves. This part of the chapter looks at each power semiconductor device in turn — how it is built, how it is biased, and the shape of its output characteristics. Understanding these devices is what makes the converter circuits in the second part of the chapter easy to follow.

Required properties of a power semiconductor device

A good power device must survive large voltages and carry large currents while wasting as little energy as possible. Ideally it should have:

  • a large blocking (withstand) voltage in the OFF state;
  • a large forward current capability and high power rating;
  • a very low, ideally zero, on-state conduction drop (forward voltage drop);
  • zero off-state leakage (reverse leakage) current;
  • instant turn-on and turn-off; and
  • the ability to withstand a large rise in temperature.

The six important power devices studied here are power diodes, power bipolar junction transistors (BJTs), silicon controlled rectifiers (SCRs), the TRIAC, power MOSFETs and IGBTs.

The power diode

A power diode is a two-terminal device that conducts a large current in the forward direction with very little power loss, while blocking a large voltage in the reverse direction. It is the simplest power switch and the building block of every rectifier.

Construction of a power diode

To block a large reverse voltage, a diode needs a wide depletion layer, and a wide depletion layer needs a region of low charge (low doping) density. To achieve this, a lightly doped n region — written n- and called the drift layer or epitaxial layer — is sandwiched between a heavily doped p+ anode and a heavily doped n+ cathode. The heavily doped anode and cathode have impurity densities of about 1019 cm−310^{19}\ \text{cm}^{-3}, while the drift layer is lower by several orders of magnitude, about 1014 cm−310^{14}\ \text{cm}^{-3}. The lightly doped drift layer gives the wide depletion region needed for reverse blocking, and its resistance is reduced during forward conduction by conductivity modulation (below). Figure 9.1.1 shows the circuit symbol, a photograph, and the layered cross-section with the anode and cathode metallisation.

Power diode under forward bias

The diode is forward biased when the p+ anode is joined to the positive terminal and the n+ cathode to the negative terminal of the supply. At low forward bias, holes injected from the p+ side into the n- drift region simply recombine with electrons there. At higher forward bias (large forward current), holes from the p+ region reach the n- / n+ boundary and pull electrons out of the n+ cathode into the drift region, so that the electron density becomes equal to the hole density right across the drift region. This simultaneous injection of both carrier types is called double injection. Its consequence is conductivity modulation — the flood of extra carriers greatly increases the conductivity of the otherwise lightly doped drift layer, which is exactly what keeps the on-state voltage drop small. Figure 9.1.2 shows the junction under thermal equilibrium and under carrier injection.

Voltage drop of a forward-conducting power diode

The forward drop across a conducting power diode has two parts: the drop across the p+ n- junction and the ohmic drop across the resistive drift region. Writing VRD=RONIFV_{RD} = R_{ON} I_F for the ohmic term gives VAK=Vj+RONIFV_{AK} = V_j + R_{ON} I_F. Because the second term rises linearly with forward current, the ohmic drop makes the forward V–I characteristic of a power diode more straight-line (linear) than that of an ordinary signal diode.

Power diode under reverse bias

The diode is reverse biased when the p+ anode is joined to the negative terminal and the n+ cathode to the positive terminal. Two situations arise depending on how far the depletion layer spreads:

  • Non-punch-through diode: the depletion boundary does not reach the end of the drift layer. The electric-field strength is maximum at the p+ n- junction and falls linearly to zero before the end of the depletion region.
  • Punch-through diode: the depletion layer spans the entire drift region and touches the n+ cathode. Because the cathode is very heavily doped, the depletion penetrates negligibly into it, so the field does not fall to zero within the drift region.

Figures 9.1.3.1 and 9.1.3.2 show the two cases together with their electric-field profiles.

V–I characteristics of a power diode

The V–I characteristics of a power diode are similar to those of a signal diode and follow the Shockley diode equation, I=IS[eqV/kT−1]I = I_S\left[e^{qV/kT} - 1\right], where ISI_S is the reverse saturation current, VV the applied voltage, q=1.6×10−19 Cq = 1.6\times10^{-19}\ \text{C} the electron charge, k=1.381×10−23 J K−1k = 1.381\times10^{-23}\ \text{J K}^{-1} Boltzmann's constant and TT the temperature in kelvin. Both the forward and reverse characteristics depend on the junction temperature; the book plots them at two junction temperatures TJ1T_{J1} and TJ2T_{J2} (with TJ2<TJ1T_{J2} < T_{J1}) in Figures 9.1.4(a) and 9.1.4(b).

Power bipolar junction transistor (PBJT)

The power BJT was the first semiconductor device to give full control over both turn-on and turn-off in power circuits. It is a bipolar, current-controlled device: a small base current controls a much larger collector current. Two heavily doped n+ regions with a lightly doped p base give an npn transistor; two p+ regions with a lightly doped n base give a pnp transistor. Its three terminals are the collector, base and emitter. Figure 9.1.5 shows the npn and pnp structures and their circuit symbols.

Output V–I characteristics of a power transistor

A power transistor, like a signal transistor, works in three regions, seen on the ICI_C versus VCEV_{CE} output characteristics (Figure 9.1.6):

  • Cut-off region: with base current IB≤0I_B \le 0 the collector current is almost zero.
  • Active region: the base-emitter junction is forward biased and the base-collector junction reverse biased; the collector current stays fairly constant and is set mainly by the base current.
  • Saturation region: as VBEV_{BE} is raised, more charge is injected into the base, so base and collector currents rise; the growing drop across the external collector resistor RCR_C reduces VCBV_{CB} until the base-collector junction also becomes forward biased, and VCEV_{CE} falls to a low value.

Silicon controlled rectifier (SCR)

Modern power electronics truly began with the thyristor. One of the first was the four-layer p-n-p-n switch called the silicon controlled rectifier (SCR), introduced in 1958. Constructionally a thyristor is a four-layer, three-terminal controlled device. It can be turned on by a gate current pulse but cannot be turned off by the gate — the main current must be interrupted externally. It can block voltage in both directions but conducts current in only one direction. Figure 9.1.7 shows the circuit symbol, the pnpn construction (anode on the top p layer, cathode on the bottom n layer, gate connected to the lower p layer) and a photograph.

Two-transistor analogy of a thyristor

The action of the pnpn structure is best understood by splitting it into two interconnected transistors — a pnp transistor Q1 and an npn transistor Q2 — sharing the three junctions J1, J2 and J3. The collector of each transistor drives the base of the other, which is what gives the thyristor its latching behaviour. Figure 9.1.8 shows the layer division and the two-transistor equivalent circuit, with anode current IAI_A, gate current IGI_G, cathode current IKI_K and the current gains α1\alpha_1 and α2\alpha_2 of Q1 and Q2.

The pnpn device under forward voltage

Consider the pnpn device with the anode positive with respect to the cathode.

(a) Gate open (IG=0)(I_G = 0): junctions J1 and J3 are forward biased while J2 is reverse biased. For the two transistors, IC1=α1IA+Ico1I_{C1} = \alpha_1 I_A + I_{co1} and IC2=α2IK+Ico2I_{C2} = \alpha_2 I_K + I_{co2}, where Ico1I_{co1} and Ico2I_{co2} are the reverse saturation currents of the collector-base junctions. Since the anode current is IA=IC1+IC2I_A = I_{C1} + I_{C2}, and with the gate open IK=IAI_K = I_A, substituting and solving gives

IA=Ico1+Ico21−(α1+α2)=Ico1−(α1+α2)I_A = \frac{I_{co1} + I_{co2}}{1 - (\alpha_1 + \alpha_2)} = \frac{I_{co}}{1 - (\alpha_1 + \alpha_2)}

where Ico=Ico1+Ico2I_{co} = I_{co1} + I_{co2}. As long as VAKV_{AK} is small, IcoI_{co} is very small and α1\alpha_1 and α2\alpha_2 are each well below unity, so the anode current is only slightly larger than IcoI_{co} — the device stays in its forward-blocking state.

Note

When deriving IA=IC1+IC2I_A = I_{C1} + I_{C2}, the textbook prints "Now from figure 9.1.10(b)". This is a cross-referencing misprint: Figure 9.1.10 is the TRIAC circuit symbol. The two-transistor equivalent circuit these equations come from is Figure 9.1.8(b), which is the reference we follow here.

(b) Gate current applied: a positive gate current lets us turn the thyristor on without raising the forward voltage all the way to its break-over level. With IK=IA+IGI_K = I_A + I_G, the anode current becomes

IA=α2IG+Ico1−(α1+α2)I_A = \frac{\alpha_2 I_G + I_{co}}{1 - (\alpha_1 + \alpha_2)}

A large enough IGI_G drives (α1+α2)(\alpha_1 + \alpha_2) towards unity and switches the device on for any value of IcoI_{co}. This is called gate-assisted turn-on and is the usual way a thyristor is triggered.

Static V–I characteristics of a thyristor (SCR)

With the gate open (IG=0)(I_G = 0), VAKV_{AK} must rise to the forward break-over voltage VBRFV_{BRF} before appreciable anode current flows; at that point the thyristor triggers and the voltage across it collapses to the low holding voltage VHV_H (about 1–1.5 V), staying almost constant thereafter. The gate current strongly affects triggering: the larger the gate current, the lower the break-over voltage needed. Once the SCR has turned on, the gate loses control. Two currents describe the on-state:

  • Latching current ILI_L: the minimum anode current needed to keep the thyristor on immediately after turn-on once the gate signal is removed.
  • Holding current IHI_H: the minimum anode current needed to keep it on while gate current is still present.

The holding current is smaller than the latching current. Figure 9.1.9 shows the polarity diagram and the family of output characteristics for increasing gate current.

The TRIAC

The TRIAC (Triode for AC) is a member of the thyristor family, but unlike an SCR — which conducts only from anode to cathode — a TRIAC conducts in both directions, making it a bidirectional controlled switch. This makes it ideal for AC power control, and it is widely used in residential lamp dimmers, heater control and fan-motor control. Its three terminals are Main Terminal 1 (MT1), Main Terminal 2 (MT2) and the gate G; Figure 9.1.10 shows the circuit symbol. Because either main terminal can be positive or negative and the gate can be driven either way, there are four possible triggering (electrode-potential) modes: MT2 positive with G positive, MT2 positive with G negative, MT2 negative with G negative, and MT2 negative with G positive (all referenced to MT1).

Static characteristics of a TRIAC

Functionally a TRIAC behaves like two thyristors connected in anti-parallel, so its V–I characteristic is symmetric: the curve in the first quadrant mirrors that in the third quadrant, each resembling the forward characteristic of a thyristor. It has a forward break-over voltage VBOV_{BO} and an equal reverse break-over voltage −VBO-V_{BO}, and increasing the gate current lowers the break-over point in either direction. With no gate signal the TRIAC blocks both half-cycles of the applied AC. Because it can be triggered at any chosen instant in each half-cycle, it gives smooth phase control of AC power. Figure 9.1.11 shows the symmetric static characteristics.

Power MOSFET …

Figure 1Power diode: circuit symbol, a stud-mounted metal-can photograph, and a vertical cross-section showing the p+ anode, lightly doped n- epitaxial drift layer and n+ cathode substrate with anode and cathode metallisation.
Fig. 1 — Power diode: circuit symbol, a stud-mounted metal-can photograph, and a vertical cross-section showing the p+ anode, lightly doped n- epitaxial drift layer and n+ cathode substrate with anode and cathode metallisation.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.1 gives the three views of a power diode — the circuit symbol (anode A, cathode K), a photograph of a stud-mounted device, and the layered cross-section p+ / n- (drift/epitaxial) / n+ with doping levels of about 1019 cm−310^{19}\ \text{cm}^{-3} in the p+ and n+ layers and 1014 cm−310^{14}\ \text{cm}^{-3} in the drift layer. It shows why the wide, lightly doped d …

Figure 2Forward-biased power diode shown under thermal equilibrium and under carrier injection, with holes injected from the p+ side and electrons from the n+ side into the n- drift region.
Fig. 2 — Forward-biased power diode shown under thermal equilibrium and under carrier injection, with holes injected from the p+ side and electrons from the n+ side into the n- drift region.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.2 shows the p+ n- n+ structure (a) at thermal equilibrium, with the space-charge region at the junction, and (b) under forward bias, where holes are injected from the p+ side and electrons from the n+ side into the drift region — the double inj …

Figure 3Non-punch-through reverse-biased power diode: the depletion layer stops before the n+ cathode, with the electric-field strength falling linearly to zero within the drift region.
Fig. 3 — Non-punch-through reverse-biased power diode: the depletion layer stops before the n+ cathode, with the electric-field strength falling linearly to zero within the drift region.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.3.1 shows a non-punch-through diode under reverse bias, where the depletion layer does not reach the n+ cathode, together with its electric-field profile that is maximum at the p+ n- junction and falls to z …

Figure 4Punch-through reverse-biased power diode: the depletion layer spans the whole drift region and touches the n+ cathode, with a non-zero electric field at the cathode boundary.
Fig. 4 — Punch-through reverse-biased power diode: the depletion layer spans the whole drift region and touches the n+ cathode, with a non-zero electric field at the cathode boundary.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.3.2 shows a punch-through diode, where the depletion layer spreads across the entire drift region and reaches the n+ cathode; the field profile does not fall t …

Figure 5Forward V–I characteristics of a power diode with its measuring circuit, plotted at two junction temperatures showing the junction voltage and the on-resistance region.
Fig. 5 — Forward V–I characteristics of a power diode with its measuring circuit, plotted at two junction temperatures showing the junction voltage and the on-resistance region.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.4(a) shows the forward measuring circuit and the forward characteristic (IFI_F versus VAKV_{AK}) at two junction temperatures TJ1T_{J1} and TJ2T_{J2} (TJ2<TJ1T_{J2} < T_{J1}), marking the junction voltage $ …

Figure 6Reverse V–I characteristics of a power diode with its measuring circuit, showing the small reverse saturation current up to the reverse breakdown voltage at two junction temperatures.
Fig. 6 — Reverse V–I characteristics of a power diode with its measuring circuit, showing the small reverse saturation current up to the reverse breakdown voltage at two junction temperatures.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.4(b) shows the reverse measuring circuit and the reverse characteristic: a small reverse saturation current ISI_S until the reverse breakdown voltage VBV_B, plott …

Figure 7Structures and circuit symbols of npn and pnp power transistors, labelling the emitter, base and collector regions.
Fig. 7 — Structures and circuit symbols of npn and pnp power transistors, labelling the emitter, base and collector regions.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.5 shows the layer structures of the npn (n+ / p / n+) and pnp (p+ / n / p+) transistors and their circuit symbols, with the emitter-arrow direction distinguishing the two. The power BJT is a current-controlled device in which a small base current controls a much larger collector current; not …

Figure 8Common-emitter bias circuit of an npn power transistor together with its output characteristics showing the cut-off, active and saturation regions.
Fig. 8 — Common-emitter bias circuit of an npn power transistor together with its output characteristics showing the cut-off, active and saturation regions.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.6 shows the common-emitter bias circuit (with base-emitter forward biased and base-collector reverse biased) and the family of ICI_C versus VCEV_{CE} output curves, marking the cut- …

Figure 9Thyristor (SCR): circuit symbol, the four-layer pnpn schematic construction with the gate on the lower p layer, and a stud-mounted photograph.
Fig. 9 — Thyristor (SCR): circuit symbol, the four-layer pnpn schematic construction with the gate on the lower p layer, and a stud-mounted photograph.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.7 shows the SCR circuit symbol (anode A, cathode K, gate G), the pnpn schematic construction with the gate connected to the lower p layer, and a photograph of a stud-mounted thyristor. Note it is a four-layer, three-terminal device that is turned on by a gate pulse but cannot be turned off by the gate; it bl …

Figure 10Two-transistor analogy of a thyristor: the pnpn stack split into interlocking pnp and npn transistors, and the two-transistor equivalent circuit with anode, gate and cathode currents.
Fig. 10 — Two-transistor analogy of a thyristor: the pnpn stack split into interlocking pnp and npn transistors, and the two-transistor equivalent circuit with anode, gate and cathode currents.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.8 shows (a) the pnpn structure divided into two transistors across junctions J1, J2, J3 and (b) the two-transistor equivalent circuit with transistors Q1 (pnp) and Q2 (npn), currents IAI_A, IGI_G, IKI_K and gains α1\alpha_1, α2\alpha_2. This is the figure the forward-voltage equations are derive …

Figure 11Static V–I characteristics of a thyristor showing the forward break-over voltage, holding voltage, and a family of curves for increasing gate current with latching and holding currents marked.
Fig. 11 — Static V–I characteristics of a thyristor showing the forward break-over voltage, holding voltage, and a family of curves for increasing gate current with latching and holding currents marked.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.9 shows the polarity diagram and the SCR output characteristics: the forward break-over voltage VBRFV_{BRF} falling as gate current increases, the holding voltage VHV_H, and the latching ILI_L and h …

Figure 12Circuit symbol of a TRIAC, showing the two main terminals MT1 and MT2 and the gate terminal for a bidirectional switch.
Fig. 12 — Circuit symbol of a TRIAC, showing the two main terminals MT1 and MT2 and the gate terminal for a bidirectional switch.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.10 shows the TRIAC circuit symbol — two anti-parallel triangles between main terminals MT1 and MT2 with a gate lead G — representing a bidirectional controlled switch. Because it conducts in both directions it suits AC power control such as lamp dimmers and heaters; either main terminal can be positive and …

Figure 13Symmetric static V–I characteristics of a TRIAC, with equal forward and reverse break-over voltages and a family of curves for increasing gate current in both quadrants.
Fig. 13 — Symmetric static V–I characteristics of a TRIAC, with equal forward and reverse break-over voltages and a family of curves for increasing gate current in both quadrants.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.11 shows the TRIAC's symmetric characteristic in the first and third quadrants, with break-over voltages VBOV_{BO} and −VBO-V_{BO} that both fall as gate current increases. The first-quadrant curve mirrors the third, each like a thyristor's forward characteristic; with no gate signal it blocks both half-cycles, …

Figure 14Power MOSFET: circuit symbols of the n-channel and p-channel enhancement types and a photograph of a real power MOSFET package.
Fig. 14 — Power MOSFET: circuit symbols of the n-channel and p-channel enhancement types and a photograph of a real power MOSFET package.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.12 (titled "MOSFET" in the corrigendum) shows the n-channel and p-channel enhancement-type circuit symbols — drain D, source S and insulated gate G — and a photograph of a real power MOSFET. In the printed book this figure appeared without a caption; the figure number is confirmed by th …

Figure 15Output characteristics of a power MOSFET with its test circuit, plotting drain current against drain-source voltage for increasing gate-source voltage, showing the ohmic and active regions.
Fig. 15 — Output characteristics of a power MOSFET with its test circuit, plotting drain current against drain-source voltage for increasing gate-source voltage, showing the ohmic and active regions.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.13 shows the MOSFET test circuit and the IDI_D versus VDSV_{DS} output curves for increasing VGSV_{GS}, marking the ohmic region (with rDS(ON)r_{DS(ON)}), the active region and cut-off. Following the corrigendum, the source terminal in the circuit is shown grounded …

Figure 16Circuit symbol and photograph of an IGBT, showing the collector, insulated gate and emitter of a hybrid MOSFET-input, BJT-output device.
Fig. 16 — Circuit symbol and photograph of an IGBT, showing the collector, insulated gate and emitter of a hybrid MOSFET-input, BJT-output device.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.14 shows the IGBT circuit symbol — a MOSFET-style insulated gate with a BJT-style emitter arrow, terminals collector C, gate G and emitter E — and a photograph of a real IGBT package. It combines the high input impedance of a MOSFET (voltage-controlled, insulated …

Figure 17Static output characteristics of an IGBT with its test circuit, plotting collector current against collector-emitter voltage for increasing gate-emitter voltage, showing cut-off, active and saturation regions.
Fig. 17 — Static output characteristics of an IGBT with its test circuit, plotting collector current against collector-emitter voltage for increasing gate-emitter voltage, showing cut-off, active and saturation regions.

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

Figure 9.1.15 shows the IGBT test circuit and the ICI_C versus VCEV_{CE} output curves for increasing VGEV_{GE}, marking the cut-off, active and saturation regions. Following the corrigendum, the emitter is shown grounded (the p …

Formula 18Forward voltage drop of a conducting power diode

VAK=Vj+VRD=Vj+RONIFV_{AK} = V_j + V_{RD} = V_j + R_{ON} I_F The forward drop equals the p+ n- junction drop VjV_j plus the ohmic drop across the drift region, where RONR_{ON} is the on-resistance and IFI_F the forward current. The linear ohmic term is what …

Formula 19Shockley diode equation for the power diode current

I=IS[eqV/kT−1]I = I_S\left[e^{qV/kT} - 1\right] Here ISI_S is the reverse saturation current, VV the applied voltage, q=1.6×10−19 Cq = 1.6\times10^{-19}\ \text{C}, k=1.381×10−23 J K−1k = 1.381\times10^{-23}\ \text{J K}^{-1} a …

Formula 20SCR anode current from the two-transistor analogy

With the gate open (IG=0)(I_G = 0): IA=Ico1−(α1+α2),Ico=Ico1+Ico2.I_A = \frac{I_{co}}{1 - (\alpha_1 + \alpha_2)},\quad I_{co} = I_{co1}+I_{co2}. With a gate current IGI_G applied (IK=IA+IG)(I_K = I_A + I_G): IA=α2IG+Ico1−(α1+α2).I_A = \frac{\alpha_2 I_G + I_{co}}{1 - (\alpha_1 + \alpha_2)}. As (α1+α2)→1(\alpha_1 + \alpha_2) \to 1 the anode …

Definition 21Drift layer (epitaxial layer)

The lightly doped n- region (about 1014 cm−310^{14}\ \text{cm}^{-3}) placed between the heavily doped p+ anode and n+ cathode of a power diode. Its low charge density gives the wide depletion region need …

Definition 22Conductivity modulation

The large rise in conductivity of the lightly doped drift region under high forward bias, caused by double injection — holes from the p+ region and electrons from the n+ region flooding the drift layer — which …

Definition 23Latching current (I_L)

The minimum anode current required to keep a thyristor in its on-state immediately after it has been turned on and the gate signal has been removed. It is larger than the holding current, so the anode current must climb above ILI_L before a short trigger pulse is removed, otherwise the …

Definition 24Holding current (I_H)

The minimum anode current required to keep a thyristor conducting while gate current is applied. The holding current is smaller than the latching current. If the anode current falls below IHI_H, the thyristor turns off and returns to its forward-blocking state — which is how an SCR is switch …

Definition 25Punch-through vs non-punch-through diode

In a non-punch-through diode the reverse depletion layer stops before the n+ cathode and the electric field falls to zero within the drift region. In a punch-through diode the depletion layer spans the whole drift region and reaches the n+ cathode, so th …