Arithmetic logic circuits

A logic circuit that performs arithmetic operations (addition, subtraction, etc.) in a digital computer. Multiplication is done as repeated addition, division as repeated subtraction, and subtraction as addition using 1's/2's-complement arithmetic — so adder an …

A combinational circuit that adds two single bits A and B, giving a sum and a carry: Sum = A ⊕ B, Carry = AB. Its limitation is that it has no input for a carry from a previous stage, so it cannot be …

Figure 10.3.1: a block labelled Half Adder with the two inputs A and B entering on the left and the two outputs Sum and Carry leaving on the right. What to notice: the two outputs are separate — Sum = A ⊕ B is the bit written down and Carry = AB is passed to the next column …

Figure 10.3.2: inputs A and B feed an XOR gate whose output is Sum = A ⊕ B, and also feed an AND gate whose output is Carry = AB. What to notice: the same two inputs drive both gates in parallel — the XOR produces the sum bit while the AND produces the carry bit; there is no ca …

$\text{Sum} = A \oplus B = \overline{A}B + A\overline{B}$ and $\text{Carry} = AB$. The sum bit is the XOR of A and B (HIGH when they differ) and the carry bit is their AND (HIGH only when both are 1). These two relations follow directly f …

Figure 10.3.3: waveforms A = 0,0,1,1; B = 0,1,0,1; Sum = 0,1,1,0; Carry = 0,0,0,1. Reading the pattern: Sum follows A ⊕ B, HIGH where A and B differ (columns 2 and 3); Carry follows AB, HIGH only in the last column where both A and B are 1 — th …

Figure 10.3.5: five NAND gates. Gate 1 forms $\overline{AB}$; gates 2 and 3 form $\overline{A}+AB$ and $\overline{B}+AB$; gate 4 gives Sum = A ⊕ B; gate 5 acts as an inverter giving Carry = AB. What to notice: the whole half adder is built from universal NAND gates alone, producing the sa …

A combinational circuit that subtracts one bit B from another bit A, giving a difference and a borrow: Difference = A ⊕ B, Borrow = ĀB (A-complement AND B). Built from one …

Figure 10.3.4: inputs A and B feed an XOR gate giving Difference = A ⊕ B; A is inverted and ANDed with B to give Borrow = $\overline{A}B$. What to notice: the XOR gives the difference (HIGH when A and B differ), while inverting A before ANDing with B gives the borrow $\overl …

$\text{Difference} = A \oplus B = \overline{A}B + A\overline{B}$ and $\text{Borrow} = \overline{A}B$. The difference bit is the XOR of A and B (HIGH when they differ), matching the half adder's sum; the borrow $\overline{A}B$ is HIGH only when …

Block diagram (p389): a block labelled Half Subtractor with inputs A and B on the left and outputs Difference Y and Borrow Bo on the right; relations Difference Y = A ⊕ B = $\overline{A}B + A\overline{ …

Half-subtractor NAND circuit (p389): a network of five NAND gates producing Difference = A ⊕ B and Borrow = $\overline{A}B$, with intermediate nodes $\overline{AB}$, $\overline{A}+AB$ an …

A combinational circuit that adds three input bits A, B and a carry-in Cin, giving a sum and a carry-out: S = A ⊕ B ⊕ Cin, Co = AB + BCin + CinA. Chaining full adders allows …

Figure 10.3.6: a block labelled Full adder with three inputs A, B and Cin on the left and two outputs Sum and Co on the right. What to notice: unlike the half adder this block has a third input Cin for the carry from the previous stage, so full adders can be chained to add …

$S = A \oplus B \oplus C_{in}$ and $C_o = AB + BC_{in} + C_{in}A$. The sum S is the XOR of all three inputs (HIGH when an odd number of them are 1), and the carry-out Co is HIGH whenever any two of A, B and Cin are 1 — the …

Figure 10.3.7: waveforms A = 0,0,0,0,1,1,1,1; B = 0,0,1,1,0,0,1,1; Cin = 0,1,0,1,0,1,0,1; Sum = 0,1,1,0,1,0,0,1; Co = 0,0,0,1,0,1,1,1. Reading the pattern: over all eight input combinations Sum is HIGH when an odd number of A, B, Cin are 1, and Co is HIGH when two or more are …

Figure 10.3.8: A and B enter a first half adder giving A ⊕ B and AB; A ⊕ B and Cin enter a second half adder giving Sum = A ⊕ B ⊕ Cin and (A ⊕ B)Cin; the AB and (A ⊕ B)Cin outputs feed an …

Figure 10.3.9: XOR gate 1 gives A ⊕ B, XOR gate 2 gives Sum = A ⊕ B ⊕ Cin; AND gate 1 gives AB, AND gate 2 gives (A ⊕ B)Cin; an OR gate combines them to give Co = AB + BCin + ACin. What to notice: the two XOR gates build the sum while the two AND gates and the OR collec …

Figure 10.3.10: a single three-input XOR gate gives Sum = A ⊕ B ⊕ Cin; three 2-input AND gates (A,B), (B,Cin), (Cin,A) feed a 3-input OR gate giving Carry = AB + BCin + CinA. What to notice: one three-input XOR forms the sum directly, while three AND gates and an OR form the majority carry — t …