Counters

A counter is a logic circuit that counts pulses. It is a set of flip-flops whose combined state advances through a fixed sequence as pulses arrive at its input. Counters divide broadly into two families:

• Asynchronous (serial / ripple) counters, in which the flip-flops are not clocked together — each stage is triggered by the previous one, so the individual propagation delays add up. They use simple circuitry but are slower and more prone to decoding problems, where states may be momentarily skipped.
• Synchronous (parallel) counters, in which every flip-flop is clocked at the same instant, so the delays do not accumulate. They need more complex circuitry but are faster and count more accurately.

The full comparison is given in the table below.

Four-bit synchronous up-counter

A four-bit synchronous up-counter built from JK flip-flops counts upward in binary 0000, 0001, 0010, …, 1111, then rolls over to 0000, 0001, … (the complete sequence for pulses 0–15 is listed in the Counting Sequence table). All four flip-flops share the same clock line (Figure 10.7.1). The connections follow directly from how often each bit changes:

• $Q_1$ changes on every clock pulse, so FF1 is kept in toggle mode with $J_1 = K_1 = 1$.
• $Q_2$ must change whenever $Q_1 = 1$, so $Q_1$ is connected to $J_2$ and $K_2$.
• $Q_3$ must change whenever $Q_1 Q_2 = 1$, so the AND of $Q_1$ and $Q_2$ drives $J_3$ and $K_3$. …