Find the end points of the load line for the circuit given figure 2.1.11. ![Figure 2.1.11 is a voltage divider bias circuit with an npn transistor. Top rail $+12\ \text{V}$. Upper divider resistor \(R_1 = 10\ — Class 12 Electronics question](/figures/transistor-biasing/voltage-divider-bias-circuit-npn-transistor-top-fig-pyq-u3blg5.svg)

Find the end points of the load line for the circuit given figure 2.1.11.

Solved Examples · Example 3

Q. Find the end points of the load line for the circuit given figure 2.1.11.

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[!TLDR]

The load line joins $V_{CE} = 12\ \text{V}$ on the x-axis to $I_C = 4\ \text{mA}$ on the y-axis.

In a voltage divider bias circuit the emitter resistor appears in the collector loop, so Kirchhoff's voltage law around that loop gives

V_{CC} = V_{CE} + I_C(R_C + R_E)

The two end points of the DC load line come from setting each variable to zero.

x-axis point (cutoff), $I_C = 0$ :

V_{CE} = V_{CC} = 12\ \text{V}

y-axis point (saturation), $V_{CE} = 0$ : …