Common-Collector (CC) Configuration

What this figure shows. Panel (a) draws the schematic circuit: an NPN transistor with bias source $V_{EC}$ connected between emitter (through a resistor $R_E$) and the (common) collector, and bias source $V_{BC}$ connected between base and the same common collector, with input current $I_B$, output current $I_E$, and $I_C$ also marked. Panel (b) redraws the identical circuit with the transistor's standard circuit symbol, showing the COLLECTOR (rather than base as in Figure 9.26, or emitter as in Figure 9.27) as the terminal shared between the $V_{BC}$ input loop and the $V_{EC …