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Physics · Ch 9 — Semiconductor Electronics

Transistor as an Amplifier

9.4.6

Transistor as an Amplifier

A transistor biased in its active region can amplify a weak input signal -- amplification means increasing a signal's amplitude/strength. Where large amplification is needed, several transistor stages are cascaded together with coupling elements (resistors, capacitors, transformers) between them, called a multistage amplifier; the chapter develops the physics using a single-stage common-emitter amplifier. In such a circuit, the Q-point is first fixed near the middle of the DC load line so the output can swing maximally in either direction without distortion (9.4.5); a load resistor RCR_C in the collector circuit converts changes in ICI_C into an output voltage; capacitor C1C_1 couples the AC input signal VSV_S onto the base while blocking any DC bias from the source; the emitter bypass capacitor CEC_E gives the amplified AC signal a low-reactance path around the emitter resistor (so the AC gain isn't degraded by DC bias-stabilising resistance); and the coupling capacitor CCC_C passes the amplified AC signal on to the next stage in a multistage design while again blocking DC. The relations IC=βIBI_C=\beta I_B and (by Kirchhoff's voltage law in the output loop) VCE=VCC−ICRCV_{CE}=V_{CC}-I_CR_C govern the DC operating conditions exactly as in 9.4.5. During the POSITIVE half cycle of the input signal VSV_S, the forward voltage across the emitter-base junction increases, so IBI_B increases, which increases ICI_C by a factor β\beta; the larger ICI_C increases the voltage drop ICRCI_CR_C across the collector resistor, which DECREASES VCEV_{CE} -- so a positive-going input produces a negative-going (amplified) output. During the NEGATIVE half cycle, VSV_S decreases the forward voltage, so IBI_B (and ICI_C) decrease, the drop across RCR_C decreases, and VCEV_{CE} …

Figure 9.36Single-stage transistor amplifier circuit and input/output waveforms

What this figure shows. Panel (a) draws the full circuit: an NPN transistor in common-emitter configuration, biased via resistors R1R_1 and R2R_2 off the supply +VCC+V_{CC}, with emitter resistor RER_E bypassed by capacitor CEC_E, coupling capacitor C1C_1 bringing the sinusoidal source VSV_S onto the base, collector resistor RCR_C carrying ICI_C, and output coupling capacitor CCC_C taking the amplified signal off the collector towards the next stage (or output load), with IBI_B and IEI_E also marked. Panel (b) plots the input AC signal as a clean sine wave swinging between a positive peak and a negative peak about a zero baseline, and directly below it the output waveform as a sine wave of the same frequency but shifted by exactly half a cycle (its peak lines up with the input's trough and vice versa) -- the visual si …