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Q.Draw the circuit diagram of a P-N-P transistor in CE configuration.

Odisha ChseOdisha CHSE +2 Science Board Exam 2020Subjective· 2mImportance★★★★★
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Figure — PNP transistor in common-emitter configuration
Figure — PNP transistor in common-emitter configuration

A PNP transistor in common-emitter (CE) configuration has the emitter forward-biased with respect to the base and the collector reverse-biased with respect to the base, with the emitter terminal common to both the input and output circuits.

(A text description of the circuit is given below, since no image can be rendered in this format.)

Circuit description:

  • The transistor has three regions: emitter (P), base (N), collector (P) — hence PNP.
  • Input (base) circuit: A battery VEEV_{EE} (or VBBV_{BB}) is connected between the emitter and base, through a base resistor RBR_B, such that the emitter (P-region) is at a higher potential than the base (N-region) — this forward-biases the emitter–base junction. For a PNP transistor the emitter arrow (in the standard symbol) points inward, toward the base, indicating conventional current flows from emitter into the base.
  • Output (collector) circuit: A second battery VCCV_{CC} is connected between the collector and emitter, through a load resistor RCR_C in series with the collector, oriented so that the collector (P-region) is at a lower potential than the base (N-region) — this reverse-biases the collector–base junction.
  • Common terminal: The emitter is common to both the input loop (VEEV_{EE}–RBR_B–base–emitter) and the output loop (VCCV_{CC}–RCR_C–collector–emitter), which is why this arrangement is called the common-emitter (CE) configuration. …

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