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Question 73 of 88

Q.Draw the circuit diagram of NPN transistor in Common Emitter Configuration.

Tamil Nadu DgeTamil Nadu HSC (DGE) Board 2022Subjective· 3mImportance★★★★★
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Figure — Hard draw gate for an NPN transistor in common-emitter configuration. The catalog figure depicts exactly that
Figure — Hard draw gate for an NPN transistor in common-emitter configuration. The catalog figure depicts exactly that

In an NPN transistor's CE circuit, the emitter is the common (grounded) terminal shared by input and output loops, the base is biased through an input resistor from the signal source, and the collector draws current through a load resistor from the supply.

Circuit description (common-emitter configuration, NPN transistor)

  • Emitter (E): connected to the common/ground line, shared by both the input loop and the output loop — this is why the configuration is called 'common emitter'.
  • Base (B): connected through a base resistor RBR_B to the input voltage source ViV_i (biased so the base-emitter junction is forward biased); the input signal is applied here, across the base-emitter junction.
  • Collector (C): connected through a load (collector) resistor RCR_C to the DC supply VCCV_{CC} (so the collector-base junction is reverse biased); the output is taken across the collector and the emitter (i.e. across the transistor and RCR_C combination).
  • The arrow on the emitter (pointing outward, away from the base, for an NPN transistor) indicates the conventional current direction out of the emitter terminal. …

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