Skip to content

Physics · Ch 16 — Semiconductor Devices

NAND Gate

16.5.4

NAND Gate

The NAND gate is formed by connecting the output of an AND gate into the input of a NOT gate -- i.e. it is simply an AND gate followed by inversion -- and its name ('NOT-AND') reflects exactly this construction. Consequently, its output is the exact OPPOSITE of a plain AND gate's, for every input combination: the output Y is LOW (0) only when both inputs A and B are simultaneously HIGH (1); for every OTHER input combination, the output is HIGH (1). Its Boolean expression is Y=A⋅B‾Y=\overline{A\cdot B} (Fig. 16.30), the symbol being an ordinary AND-gate shape with a small inversion bubble added at its output. NAND gates have a special practical importance: together with the NOR gate, NAND is a UNIVERSAL GATE -- meaning that any other logic gate, and hence any digital function whatsoever, can in principle be built using nothing but a suitable combination of …

Figure 16.30Fig. 16.30: NAND gate symbol
Fig. 16.30 — Fig. 16.30: NAND gate symbol

Drawn by us to help you understand the concept clearly, and verified to make sure it's accurate. For exams, practice from your textbook's own diagram.

What this figure shows. The identical flat-back, semicircular-front AND-gate body shape as Fig. 16.29, with the same two input lines A and B entering the flat back edge -- but with a small open CIRCLE ('bubble') added at the output tip, exactly like the NOT gate's inversion bubble, marking that this gate's output is the logical negation of the plain AND gate's; the output line (labelled $Y=\overline{A\cdot B} …

Table T16.30Truth table for the two-input NAND gate, printed alongside Fig. 16.30's symbol, showing all four combinations of inputs A and B and the resulting output Y -- the exact complement, row for row, of the plain AND gate's truth table T16.29

Input A | Input B | Output Y

0 | 0 | 1

0 | 1 | 1 …