Q.Draw the pin diagram of PIC16F887QFN
You're viewing a preview — the full solution, concept, methods & PYQ mapping are locked.
Start your 14-day free trial to unlock the full solution →[!TLDR]
The PIC16F887 pin diagram (printed as a 40-pin PDIP in the chapter) groups pins into five I/O ports RA, RB, RC, RD, RE, plus VDD/VSS power, the OSC1/OSC2 oscillator pins and MCLR reset, with each pin carrying multiplexed analog, comparator, serial and timer functions.
[!NOTE]
The textbook's chapter gives the PIC16F884/887 pin diagram in the 40-pin PDIP package (captioned '40-Pin PDIP'); it does not print a separate QFN-package drawing. The answer below therefore describes the 40-pin pin diagram exactly as it appears in the textbook — the pin names and functions are the same signals regardless of package.
Pin numbers are written inside the package and pin names outside. Every pin is a bidirectional I/O line with several multiplexed (alternate) functions.
Left side (pins 1–20):
- 1: RE3/MCLR/Vpp (master clear / reset and programming voltage)
- 2–7: PORTA — RA0–RA5, carrying analog inputs AN0–AN4, the comparator inputs/outputs (C1/C2), voltage references (Vref+, Vref-, CVref), ULPWU, T0CKI and SS.
- 8–10: PORTE — RE0/AN5, RE1/AN6, RE2/AN7.
- 11: VDD (power); 12: VSS (ground).
- 13–14: RA7/OSC1/CLKIN and RA6/OSC2/CLKOUT (oscillator pins).
- 15–18: PORTC — RC0–RC3, carrying Timer1 oscillator, CCP1/CCP2, SCK/SCL functions.
- 19–20: RD0, RD1 (PORTD).
Right side (pins 40–21):
- 40–33: PORTB — RB7–RB0, carrying ICSPDAT/ICSPCLK (in-circuit serial programming), analog inputs AN8–AN13, PGM, T1G and the external interrupt INT.
- 32: VDD; 31: VSS. …
Unlock everything free for 14 days
- Full step-by-step solutions
- Concept-first explanations
- Methods, shortcuts & mistakes
- PYQ mapping + timed mock tests
Full access for 14 days. No credit card required.