The NAND gate is formed by feeding an AND gate's output through a NOT gate, so its output is the exact complement of a plain AND gate's: LOW only when both inputs are HIGH, and HIGH for every other combination -- Boolean expression $Y=\overline{A\cdot B}$ (note this negates the whole AND product, not each input separately). The NOR gate is similarly formed by feeding an OR gate's output through a NOT gate, giving the exact complement of a plain OR gate's output: HIGH only when both inputs are LOW, and LOW for every other combination -- Boolean expression $Y=\overline{A+B}$. Both NAND and NOR are individually UNIVERSAL gates, meaning any other logic gate, and hence any digital function whatsoever, can in principle be constructed purely from combinations of one or the other alone -- a property central to how much real digital hardware is actually built. …