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Q.Draw the schematic circuit diagram for a NPN transistor in common emitter configuration.

Puducherry TnboardTamil Nadu HSC (DGE) Board 2026Subjective· 2mImportance★★★★★
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Figure — Hard draw gate for the schematic circuit of an NPN transistor in common-emitter configuration. The catalog fig
Figure — Hard draw gate for the schematic circuit of an NPN transistor in common-emitter configuration. The catalog fig

In an NPN common-emitter circuit, the emitter is the common terminal; the base-emitter junction (forward biased) forms the input loop, and the collector (through a load resistor to the supply) forms the output loop, with the emitter grounded.

Circuit description

In the common-emitter (CE) configuration:

              +Vcc
               |
              R_C
               |
input --[Cin]--o---- Base    Collector ----o--[Cout]-- output
     (with bias           NPN            (across R_C)
      resistors R1,R2)   transistor
                          Emitter
                             |
                           ground (common to input and output)
  • The emitter is grounded/common to both the input and output loops (hence "common emitter").
  • Input circuit: base-emitter junction, forward biased by a voltage-divider (or base-resistor) network, with the small AC signal coupled in via a capacitor at the base. …

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