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Question Bank (5 marks) · Q5

Q.Draw the circuit diagram and explain with graph the frequency response of CE amplifier.

Karnataka PUCTextbookLong· 5mImportance★★★★★est
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[!TLDR]

A CE amplifier's voltage gain is flat only in a mid-frequency band, falling at low frequencies (coupling/bypass capacitor reactance) and at high frequencies (junction/stray capacitance); the bandwidth is fH−fLf_H-f_L at the 0.707AmA_m (3 dB) points.

Circuit: a single-stage voltage-divider-biased CE amplifier — R1,R2R_1,R_2 set the base bias, RCR_C is the collector load, RER_E with bypass capacitor CEC_E stabilises the bias; the input signal is coupled through C1C_1 and the output through C2C_2.

Frequency-response graph: voltage gain AvA_v is plotted against frequency ff (log scale). The curve rises at low frequencies, becomes flat at a maximum value AmA_m over the mid band, and rolls off at high frequencies. Three regions:

  1. Low-frequency region: the coupling capacitors C1,C2C_1,C_2 and the emitter bypass capacitor CEC_E have high reactance (XC=1/2πfC)(X_C=1/2\pi f C). C1C_1 and C2C_2 then drop part of the signal and pass only a fraction to the next stage/load, while an unbypassed RER_E introduces negative feedback; both reduce the gain. So the gain is small at low frequencies.

  2. Mid-frequency region: here the reactances of C1,C2,CEC_1,C_2,C_E are so small that these capacitors act as shorts, while the transistor junction and stray capacitances are still large enough in reactance to be treated as open. The gain is therefore constant at its maximum value AmA_m. …

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