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Question Bank (2 marks) · Q19

Q.Draw the block diagram of the counting Analog to Digital converter.

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[!TLDR]

The counting ADC uses a comparator, an AND gate, a binary counter and a DAC in a feedback loop.

A clear pulse resets the counter. Clock pulses pass through the AND gate (enabled by the comparator) to increment the counter. The counter's digital output drives a DAC, producing a rising staircase VoV_o that the comparator continuously checks against the analog input VAV_A. While VA>VoV_A > V_o the comparator keeps the gate open; when VoV_o just exceeds VAV_A, the comparator disables the gate and …

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