Q.Distinguish between SR and JK flip flop.

A flip-flop is the basic memory element of sequential logic — a bistable device that has two stable states (0 and 1) and can store a single bit of information indefinitely until it is told to change. Most flip-flops are clocked, meaning they respond to their inputs only at the instant of an active clock pulse, a regularly repeating timing signal that synchronises the whole circuit.

The SR (Set-Reset) flip-flop has a Set input and a Reset input; it sets the output to 1, resets it to 0, or holds, but the combination $S = R = 1$ is forbidden because it gives an undefined output. The D (Data or Delay) flip-flop has a single input and simply transfers the value of D to the output at the clock edge, storing one bit cleanly. The JK flip-flop improves on the SR type by defining the previously forbidden state as a toggle: when $J = K = 1$ the output flips to its complement. The T (Toggle) flip-flop is a JK flip-flop with its two inputs tied together, so it toggles on every clock pulse. …