Q.Draw the logic diagram and counting sequence of a four bit synchronous up counter.

In a four-bit synchronous up counter all four J-K flip-flops receive the clock at the same time, and the counting sequence runs from 0000 up to 1111. …

[!TLDR]

A 4-bit synchronous up counter of four J-K flip-flops (all clocked together) counts 0000 to 1111 and rolls over.

Logic diagram: four J-K flip-flops FF1–FF4 with a common clock applied to all of them at once (this is what makes it synchronous). The J and K inputs are connected so that each flip-flop toggles only when all the lower flip-flops are 1:

• FF1: $J_1=K_1=1$ — toggles on every clock (it is always in toggle mode).
• FF2: $J_2=K_2=Q_1$ — toggles when $Q_1=1$.
• FF3: $J_3=K_3=Q_1Q_2$ (an AND gate) — toggles when $Q_1Q_2=1$.
• FF4: $J_4=K_4=Q_1Q_2Q_3$ (an AND gate) — toggles when $Q_1Q_2Q_3=1$.

Counting sequence (status $Q_4Q_3Q_2Q_1$):