Skip to content
Question Bank (3 marks) · Q13

Q.Draw the logic symbol, truth table and timing diagram of a T flip flop.

Karnataka PUCTextbookLong· 3mImportance★★★★★est
40% · 64/160 Questions
🔒 Locked · start free trial →

You're viewing a preview — the full solution, concept, methods & PYQ mapping are locked.

Start your 14-day free trial to unlock the full solution →

[!TLDR]

T flip-flop: T=1T=1 toggles the output every clock edge, T=0T=0 holds it; Qn+1=T⊕QnQ_{n+1}=T\oplus Q_n.

Logic symbol: a block with one toggle input TT, a clock input CLKCLK (edge-trigger triangle) and outputs Q,Q‾Q, \overline{Q}. It is obtained from a J-K flip-flop by tying JJ and KK together to form the single input TT.

Truth table (state after the clock edge):

CLKTQₙ₊₁Action
↑0QₙNo change (hold)
↑1Q̄ₙToggle (complement)

Unlock everything free for 14 days

  • Full step-by-step solutions
  • Concept-first explanations
  • Methods, shortcuts & mistakes
  • PYQ mapping + timed mock tests

Full access for 14 days. No credit card required.